 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| NCL30000 Power Factor Corrected Dimmable LED Driver The NCL30000 is a switch mode power supply controller intended for low to medium power single stage power factor (PF) corrected LED Drivers. The device is designed to operate in critical conduction mode (CrM) and is suitable for flyback as well as buck topologies. Constant on time CrM operation is particularly suited for isolated flyback LED applications as the control scheme is straightforward and very high efficiency can be achieved even at low power levels. These are important in LED lighting to comply with regulatory requirements and meet overall system luminous efficacy requirements. In CrM, the switching frequency will vary with line and load and switching losses are low as recovery losses in the output rectifier are negligible since the current goes to zero prior to reactivating the main MOSFET switch. The device features a programmable on time limiter, zero current detect sense block, gate driver, trans-conductance error amplifier as well as all PWM control circuitry and protection functions required to implement a CrM switch mode power supply. Moreover, for high efficiency, the device features low startup current enabling fast, low loss charging of the VCC capacitor. The current sense protection threshold has been set at 500 mV to minimize power dissipation in the external sense resistor. To support the environmental operation range of Solid State Lighting, the device is specified across a wide junction temperature range of -40C to 125C. Features http://onsemi.com MARKING DIAGRAM 1 SOIC-8 D SUFFIX CASE 751 A L Y W G 8 L0000 ALYW G 8 1 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package PIN CONNECTION MFP Comp Ct CS (Top View) VCC DRV GND ZCD ORDERING INFORMATION Device NCL30000DR2G Package Shipping * * * * * * * * * * * * * * * * Very Low 24 mA Typical Startup Current Constant On Time PWM Control Cycle-by-Cycle Current Protection Low Current Sense Threshold of 500 mV Low 2 mA Typical Operating Current Source 500 mA / Sink 800 mA Totem Pole Gate Driver Reference Design for TRIAC and Trailing Edge Line Dimmers Wide Operating Temperature Range No Input Voltage Sensing Requirement Enable Function and Overvoltage Protection These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant LED Driver Power Supplies LED Based Down Lights Commercial and Residential LED Fixtures TRIAC Dimmable LED Based PAR Lamps Power Factor Corrected Constant Voltage Supplies SOIC-8 2500 / Tape & Reel (Pb-Free) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Typical Applications (c) Semiconductor Components Industries, LLC, 2009 December, 2009 - Rev. 0 1 Publication Order Number: NCL30000/D NCL30000 + + - VOVP - + + VUVP E/A - + gm RMFP + VREF VCC Management VCC (Enable EA) UVP OVP MFP Fault COMP VControl VEAH Clamp VDD 275 mA* Ct Power Good PWM Add Ct Offset - + mVDD VDD DRV CS LEB 195 ns* + + - VILIM + ZCD + - VZCD(ARM) + + - VZCD(TRIG) Reset 180 ms* Off Timer ZCD Clamp * Typical Values Shown SQ RQ Demag OCP SQ RQ VCC SQ RQ DRV mVDD SQ RQ GND All SR Latches are Reset Dominant Figure 1. Block Diagram http://onsemi.com 2 NCL30000 Table 1. PIN FUNCTION DESCRIPTION Pin 1 Name MFP Function The multi-function pin is connected to the internal error amplifier. By pulling this pin below the Vuvp threshold, the controller is disabled. In addition, this pin also has an over voltage comparator which will disable the controller in the event of a fault. The COMP pin is the output of the internal error amplifier. A compensation network is connected between this pin and ground to set the loop bandwidth. Normally this bandwidth is set at a low frequency (typically 10 Hz - 20 Hz) to achieve high power factor and low total harmonic distortion (THD). The Ct pin sources a regulated current to charge an external timing capacitor. The PWM circuit controls the power switch on time by comparing the Ct voltage to an internal voltage derived from VControl. The CT pin discharges the external timing capacitor at the end of the on time cycle. The CS input is used to sense the instantaneous switch current in the external MOSFET. This signal is filtered by an internal leading edge blanking circuit. The voltage of an auxiliary zero current detection winding is sensed at this pin. When the ZCD control block circuit detects that the winding has been demagnetized, a control signal is sent to the gate drive block to turn on the external MOSFET. This is the analog ground for the device. All bypassing components should be connected to the GND pin with a short trace length. The high current capability of the totem pole gate drive (+0.5/-0.8 A) makes it suitable to effectively drive high gate charge power MOSFETs. The driver stage provides both passive and active pull down circuits that force the output to a voltage less than the turn-on threshold voltage of the power MOSFET when VCC(on) is not reached. This pin is the positive supply of the controller. The circuit starts to operate when VCC exceeds VCC(on), nominally 12 V and turns off when VCC goes below VCC(off), typically 9.5 V. After startup, the operating range is 10.2 V up to 20 V. 2 COMP 3 Ct 4 5 CS ZCD 6 7 GND DRV 8 VCC http://onsemi.com 3 NCL30000 D out EMI FILTER C in R SU D1 R1 R ZCD NCL30000 1 MFP VCC 8 C1 2 R2 Ccomp 3 CT CS GND 6 COMP DRV 7 Q1 4 C tim ZCD 5 R CS Figure 2. Simplified Flyback Application with Secondary side Constant Current Control Overview Figure 2 illustrates how the NCL30000 is configured to implement an isolated power factor corrected flyback switch mode power supply. On the secondary side is the NCS1002, a constant voltage, constant current controller which senses the average LED current and the output voltage and provides a feedback control signal to the primary side through an opto-coupler interface. One of the key benefits of active power factor correction is that it makes the load appear like a linear resistance similar to an incandescent bulb. High power factor requires generally sinusoidal line current and minimal phase displacement between the line current and voltage. The NCL30000 operates in a fixed on-time variable frequency mode where the power switch is on for the same length of time over a half cycle of input power. The current in the primary of the transformer starts at zero each switching cycle and is directly proportional to the applied voltage times the on-time. Therefore with a fixed on-time, the current will follow the applied voltage generating a current of the same shape. Just as in a traditional boost PFC circuit, the control bandwidth is low so that the on-time is constant throughout a single line cycle. The feedback signal from the secondary side is used to modify the average on-time so the current through the LEDs is properly regulated regardless of forward voltage variation of the LED string. http://onsemi.com 4 II II I I I Cv 8 VCC RL OUT2 7 + - IN2+ 5 IN2- 6 NCS1002 OUT1 1 2 - IN1- IN1+ 3 + GND Cc 4 C OUT AC Line Input Ra I I Rb Rx Rt Ry Rc RLED NCL30000 Table 2. MAXIMUM RATINGS Rating MFP Voltage MFP Current COMP Voltage COMP Current Ct Voltage Ct Current CS Voltage CS Current ZCD Voltage ZCD Current DRV Voltage DRV Sink Current DRV Source Current Supply Voltage Supply Current Power Dissipation (TA = 70C, 2.0 Oz Cu, 55 mm2 Printed Circuit Copper Clad) Symbol VMFP IMFP VControl IControl VCt ICt VCS ICS VZCD IZCD VDRV IDRV(sink) IDRV(source) VCC ICC PD RqJA RqJA RqJA TJ TJ(MAX) TSTG TL Value -0.3 to 10 10 -0.3 to 6.5 -2 to 10 -0.3 to 6 10 -0.3 to 6 10 -0.3 to 10 10 -0.3 to VCC 800 500 -0.3 to 20 20 450 178 168 127 -40 to 125 150 -65 to 150 300 Unit V mA V mA V mA V mA V mA V mA mA V mA mW C/W Thermal Resistance Junction-to-Ambient (2.0 Oz Cu, 55 mm2 Printed Circuit Copper Clad) Junction-to-Air, Low conductivity PCB (Note 3) Junction-to-Air, High conductivity PCB (Note 4) Operating Junction Temperature Range Maximum Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10 s) C C C C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Pins 1- 8: Human Body Model 2000 V per JEDEC Standard JESD22-A114E. Pins 1- 8: Machine Model Method 200 V per JEDEC Standard JESD22-A115-A. 2. This device contains Latch-Up protection and exceeds 100 mA per JEDEC Standard JESD78. 3. As mounted on a 40x40x1.5 mm FR4 substrate with a single layer of 80 mm2 of 2 oz copper traces and heat spreading area. As specified for a JEDEC 51 low conductivity test PCB. Test conditions were under natural convection or zero air flow. 4. As mounted on a 40 x 40 x 1.5 mm FR4 substrate with a single layer of 650 mm2 of 2 oz copper traces and heat spreading area. As specified for a JEDEC 51 high conductivity test PCB. Test conditions were under natural convection or zero air flow. VMFP = 2.4 V, VControl = 4 V, Ct = 1 nF, VCS = 0 V, VZCD = 0 V, CDRV = 1 nF, VCC = 12 V, unless otherwise specified (For typical values, TJ = 25C. For min/max values, TJ = -40C to 125C, unless otherwise specified) Characteristic STARTUP AND SUPPLY CIRCUITS Startup Voltage Threshold Minimum Operating Voltage Supply Voltage Hysteresis Startup Current Consumption No Load Switching Current Consumption Switching Current Consumption Fault Condition Current Consumption 0 V < VCC < VCC(on) - 200 mV CDRV = open, 70 kHz Switching, VCS = 2 V 70 kHz Switching, VCS = 2 V No Switching, VMFP = 0 V VCC Increasing VCC Decreasing VCC(on) VCC(off) HUVLO Icc(startup) Icc1 Icc2 Icc(fault) 11 8.8 2.2 - - - - 12 9.5 2.5 24 1.4 2.1 0.75 12.5 10.2 2.8 35 1.7 2.6 0.95 V V V mA mA mA mA Test Conditions Symbol Min Typ Max Unit Table 3. ELECTRICAL CHARACTERISTICS http://onsemi.com 5 NCL30000 Table 3. ELECTRICAL CHARACTERISTICS (Continued) VMFP = 2.4 V, VControl = 4 V, Ct = 1 nF, VCS = 0 V, VZCD = 0 V, CDRV = 1 nF, VCC = 12 V, unless otherwise specified (For typical values, TJ = 25C. For min/max values, TJ = -40C to 125C, unless otherwise specified) Characteristic Test Conditions Symbol Min Typ Max Unit OVERVOLTAGE AND UNDERVOLTAGE PROTECTION Overvoltage Detect Threshold Overvoltage Hysteresis Overvoltage Detect Threshold Propagation Delay Undervoltage Detect Threshold Undervoltage Detect Threshold Propagation Delay ERROR AMPLIFIER Voltage Reference Voltage Reference Line Regulation Error Amplifier Current Capability TJ = 25C TJ = -40C to 125C VCC(on) + 200 mV < VCC < 20 V VMFP = 2.6 V VMFP = 1.08*VREF VMFP = 0.5 V VMFP = 2.4 V to 2.6 V TJ = 25C TJ = -40C to 125C VMFP = VUVP to VREF VMFP = 2.5 V VMFP = 0 V IControl(pullup) = 10 mA, VMFP = VREF VControl = Decreasing until VDRV is low, VCt = 0 V VEAH - Ct(offset) VREF VREF(line) IEA(sink) IEA(sink)OVP IEA(source) gm 90 70 RMFP IMFP IControl VEAH Ct(offset) VEA(DIFF) 2 0.25 -1 5 0.37 4.5 110 110 4.6 0.54 - 5.5 0.65 4.9 120 135 10 1.25 1 6 0.88 5.3 MW mA mA V V V 2.475 2.460 -10 6 10 -110 2.500 2.500 - 10 20 -210 2.525 2.540 10 20 30 -250 V mV mA VMFP = 2 V to 3 V ramp, dV/dt = 1 V/ms VMFP = VOVP to VDRV = 10% VMFP = Decreasing VMFP = 1 V to 0 V ramp, dV/dt = 10 V/ms VMFP = VUVP to VDRV = 10% VMFP = Increasing VOVP/VREF VOVP(HYS) tOVP 105 20 - 106 60 500 108 100 800 % mV ns VUVP tUVP 0.25 100 0.31 200 0.4 300 V ns Transconductance mS Feedback Pin Internal Pull-Down Resistor Feedback Bias Current Control Bias Current Maximum Control Voltage Minimum Control Voltage to Generate Drive Pulses Control Voltage Range http://onsemi.com 6 NCL30000 Table 3. ELECTRICAL CHARACTERISTICS (Continued) VMFP = 2.4 V, VControl = 4 V, Ct = 1 nF, VCS = 0 V, VZCD = 0 V, CDRV = 1 nF, VCC = 12 V, unless otherwise specified (For typical values, TJ = 25C. For min/max values, TJ = -40C to 125C, unless otherwise specified) Characteristic RAMP CONTROL Ct Peak Voltage On Time Capacitor Charge Current Ct Capacitor Discharge Duration PWM Propagation Delay VCOMP = open VCOMP = open VCt = 0 V to VCt(MAX) VCOMP = open VCt = VCt(MAX) -100 mV to 500 mV dV/dt = 30 V/ms VCt = VControl - Ct(offset) to VDRV = 10% VCt(MAX) Icharge tCt(discharge) tPWM 4.775 235 - - 4.93 275 50 130 5.025 297 150 220 V mA ns ns Test Conditions Symbol Min Typ Max Unit ZERO CURRENT DETECTION ZCD Arming Threshold ZCD Triggering Threshold ZCD Hysteresis ZCD Bias Current Positive Clamp Voltage Negative Clamp Voltage ZCD Propagation Delay VZCD = 5 V IZCD = 3 mA IZCD = -2 mA VZCD = 2 V to 0 V ramp, dV/dt = 20 V/ms VZCD = VZCD(TRIG) to VDRV = 90% VZCD = Increasing VZCD = Decreasing VZCD(ARM) VZCD(TRIG) VZCD(HYS) IZCD VCL(POS) VCL(NEG) tZCD 1.25 0.6 500 -2 9.8 -0.9 - 1.4 0.7 700 - 10 -0.7 100 1.55 0.83 900 +2 12 -0.5 170 V V mV mA V V ns Minimum ZCD Pulse Width Maximum Off Time in Absence of ZCD Transition DRIVE Drive Resistance Rise Time Fall Time Drive Low Voltage CURRENT SENSE Current Sense Voltage Threshold Leading Edge Blanking Duration Overcurrent Detection Propagation Delay Current Sense Bias Current VCS = 2 V, VDRV = 90% to 10% dV/dt = 10 V/ms VCS = VILIM to VDRV = 10% VCS = 2 V Isource = 100 mA Isink = 100 mA 10% to 90% 90% to 10% VCC = VCC(on)-200 mV, Isink = 10 mA Falling VDRV = 10% to Rising VDRV = 90% tSYNC tstart - 75 70 165 - 300 ns ms ROH ROL trise tfall Vout(start) - - - - - 12 6 35 25 - 20 13 80 70 0.2 W ns ns V VILIM tLEB tCS ICS 0.45 100 40 -1 0.5 195 100 - 0.55 350 170 1 V ns ns mA http://onsemi.com 7 NCL30000 TYPICAL CHARACTERISTICS VOVP/VREF, OVERVOLTAGE DETECT THRESHOLD (%) 107 VOVP(HYS), OVERVOLTAGE HYSTERESIS (mV) 80 70 106 60 50 105 -50 -25 0 25 50 75 100 125 40 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) VUVP, UNDERVOLTAGE DETECT THRESHOLD (V) TJ, JUNCTION TEMPERATURE (C) Figure 3. Overvoltage Detect Threshold vs. Junction Temperature RMFP, FEEDBACK PIN INTERNAL PULL- DOWN RESISTOR (MW) 7 6 5 4 3 2 1 Figure 4. Overvoltage Hysteresis vs. Junction Temperature 0.325 0.320 0.315 0.310 0.305 0.300 -50 -25 0 25 50 75 100 125 0 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 5. Undervoltage Detect Threshold vs. Junction Temperature 2.54 VREF, REFERENCE VOLTAGE (V) 2.53 2.52 2.51 2.50 2.49 2.48 2.47 2.46 -50 -25 0 25 50 Figure 6. MFP Pin Internal Pull-Down Resistor vs. Junction Temperature 75 100 125 TJ, JUNCTION TEMPERATURE (C) Figure 7. Reference Voltage vs. Junction Temperature http://onsemi.com 8 NCL30000 TYPICAL CHARACTERISTICS 16 IEA(sink), ERROR AMPLIFIER SINK CURRENT (mA) 14 12 10 8 6 -50 IEA(source), ERROR AMPLIFIER SOURCE CURRENT (mA) VMFP = 2.6 V 220 215 210 205 200 195 190 185 180 -50 -25 0 25 50 VMFP = 0.5 V -25 0 25 50 75 100 125 75 100 125 TJ, JUNCTION TEMPERATURE (C) gm, ERROR AMPLIFIER TRANSCONDUCTANCE (mS) gm, ERROR AMPLIFIER TRANSCONDUCTANCE (mS) TJ, JUNCTION TEMPERATURE (C) Figure 8. Error Amplifier Sink Current vs. Junction Temperature Figure 9. Error Amplifier Source Current vs. Junction Temperature 200 180 160 140 120 100 80 60 40 20 0 RControl = 100 kW CControl = 2 pF VMFP = 2.5 Vdc, 1 Vac VCC = 12 V TA = 25C 0.01 0.1 1 10 100 Transconductance Phase 200 180 160 140 120 100 80 60 40 20 0 1000 q, PHASE (DEGREES) 125 120 115 110 105 100 95 90 85 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) f, FREQUENCY (kHz) Figure 10. Error Amplifier Transconductance vs. Junction Temperature Ct(offset), MINIMUM CONTROL VOLTAGE TO GENERATE DRIVE PULSES (V) 1.0 Figure 11. Error Amplifier Transconductance and Phase vs. Frequency 278 Icharge, Ct CHARGE CURRENT (mA) 276 274 272 270 268 266 264 -50 -25 0 25 50 75 100 125 0.9 0.8 0.7 0.6 0.5 0.4 0.3 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 12. Minimum Control Voltage to Generate Drive Pulses vs. Junction Temperature Figure 13. On Time Capacitor Charge Current vs. Junction Temperature http://onsemi.com 9 NCL30000 TYPICAL CHARACTERISTICS tPWM, PWM PROPAGATION DELAY (ns) 6.0 VCt(MAX), Ct PEAK VOLTAGE (V) 170 160 150 140 130 120 110 100 -50 -25 0 25 50 75 100 125 5.5 5.0 4.5 4.0 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) VILIM, CURRENT SENSE VOLTAGE THRESHOLD (V) TJ, JUNCTION TEMPERATURE (C) Figure 14. Ct Peak Voltage vs. Junction Temperature 0.520 0.515 0.510 0.505 0.500 0.495 0.490 0.485 0.480 -50 -25 0 25 50 75 100 tLEB, LEADING EDGE BLANKING DURATION (ns) 220 Figure 15. PWM Propagation Delay vs. Junction Temperature 210 200 190 125 180 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 16. Current Sense Voltage Threshold vs. Junction Temperature tstart, MAXIMUM OFF TIME IN ABSENCE OF ZCD TRANSITION (ms) 205 200 DRIVE RESISTANCE (W) 195 190 185 180 175 170 165 -50 -25 0 25 50 75 100 125 18 16 14 12 10 8 6 4 2 Figure 17. Leading Edge Blanking Duration vs. Junction Temperature ROH ROL 0 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 18. Maximum Off Time in Absence of ZCD Transition vs. Junction Temperature Figure 19. Drive Resistance vs. Junction Temperature http://onsemi.com 10 NCL30000 TYPICAL CHARACTERISTICS 13 ICC(startup), STARTUP CURRENT CONSUMPTION (mA) 12 11 10 9 8 -50 VCC(on) 26 24 22 20 18 16 14 -50 VCC, SUPPLY VOLTAGE THRESHOLDS (V) VCC(off) -25 0 25 50 75 100 125 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 20. Supply Voltage Thresholds vs. Junction Temperature 2.16 ICC2, SWITCHING CURRENT CONSUMPTION (mA) 2.14 2.12 2.10 2.08 2.06 2.04 2.02 2.00 -50 -25 0 25 50 Figure 21. Startup Current Consumption vs. Junction Temperature 75 100 125 TJ, JUNCTION TEMPERATURE (C) Figure 22. Switching Current Consumption vs. Junction Temperature http://onsemi.com 11 NCL30000 THEORY OF OPERATION High power factor requires generally sinusoidal line current and minimal phase displacement between the line current and voltage. Normally this is not the case with a traditional isolated flyback topology so the first step to achieve high power factor is to have minimal capacitance before the switching stage to allow a more sinusoidal input current. A simplified block diagram is illustrated in Figure 23. Since the input bulk capacitor has virtually been AC Line Input EMI Filter Primary eliminated except for a small capacitor, the voltage to the flyback converter now follows a rectified sine shape at twice the line frequency. By employing a critical conduction mode control technique such that the input current is kept to the same shape, high power factor can be achieved. The NCL30000 is a voltage mode, fixed on-time controller specifically intended for such applications. Secondary Zero Current Detect & Bias Winding NCL30000 Controller Figure 23. Simplified Block Diagram Since the input voltage waveform to the flyback is sinusoidal, with a fixed on-time control scheme, the current through the transformer primary will increase directly with the line voltage and the average current drawn from the line will have a sinusoidal shape. When the switch is turned off the energy from the primary will be transferred to the secondary. By monitoring the auxiliary winding the controller can detect when the secondary current reaches zero and restart the switching cycle to transfer additional energy to the load. The current in the primary of the transformer starts at zero each switching cycle and is directly proportional to the applied voltage times the on-time. One of the primary benefits of this CrM approach is that we can operate with zero current switching which results in a very efficient architecture for low to medium power applications. A secondary side control loop monitors the average LED current and adjusts the on-time to maintain proper regulation. To achieve high power factor, the control loop bandwidth must be sufficiently low such that the on-time is constant across a line half cycle. Since the off time varies depending on the energy transferred through the transformer and the load, the switching frequency varies with load and line. Figure 24 illustrates the theoretical current waveform through the primary and secondary transformer windings. The energy delivered to the load through the transformer will follow the product of voltage and current which is a sine-squared shape. As a result of this sine-squared energy transfer, the load will experience ripple at twice the line frequency, either 100 or 120 Hz depending on the source. The delivered power through the transformer starts at zero, rises to a peak and returns to zero following the shape of the rectified input line. The 100/120 Hz ripple is superimposed on the normal switching waveform of the PWM converter. The maximum on-time must be set such that the maximum power is delivered at the minimum required operation voltage. The LED current required for a particular application is generally specified as an average value. LEDs can tolerate ripple current as long as the ripple frequency is above the visible range of the human eye and the peak current does not exceed the rating of the LEDs. Just like a standard flyback, the output capacitors filter the pulsing power from the transformer to match the average current required by the LED and must be sized appropriately to limit the peak current through the LEDs. http://onsemi.com 12 I CC/CV Control NCL30000 The NCL30000 (refer to the block diagram - Figure 1) is composed of 4 key functional blocks along with protection circuitry to ensure reliable operation of the controller. * On-Time Control * Zero Current Detection Control * MOSFET Gate Driver * Startup and VCC Management On Time Control Ipr(peak) Ipr(t) IS(t) Iin(peak) Iin(t) ON MOSFET OFF Figure 24. Theoretical Switching Waveform The LED current is compared to a reference and an error signal is passed to the NCL30000 controller to maintain the desired average level. This error signal adjusts the on-time of the power switch to pass the required energy through the flyback transformer to achieve proper regulation of the LED load. Just like in a traditional PFC boost converter, the loop bandwidth must be low enough to filter out the twice line frequency ripple otherwise the power factor correction element of the circuit will be compromised. In the event of an open LED fault, a constant voltage loop regulates the output voltage across the output capacitor to assure safe operation. The on-time control circuitry (Figure 25) consists of a precision current source which charges up an external capacitor (Ct) in a linear ramp. The voltage on Ct (after removing an internal offset) is compared to an external control voltage and the output of the comparator is used to turn off the output driver thus terminating the switching cycle. A signal from the driver is fed back to the on-time control block to discharge the Ct capacitor thus preparing the circuit for the start of the next switching cycle. The state of Vcontrol is determined by the external regulation loop and varies with the rms input voltage and the output load. To achieve high power factor, the regulation loop is designed so that in steady state, the Vcontrol value is held constant over a line half cycle. This results in fixed on time operation. The range of on-time is determined by the charging slope of the Ct capacitor and is clamped at 4.93 V nominal. The Ct capacitor is sized to ensure that the required on-time is reached at maximum output power and the minimum input line voltage condition. Because the ramp has a wide dynamic range, the control loop can accommodate wide variation of line voltage and load power range. http://onsemi.com 13 NCL30000 VControl COMP VDD VEAH MOSFET Conduction Output Rectifier Conduction Icharge Ct PWM + DRV Ct(offset) VCt VCt(off) VControl VControl - Ct(offset) - + ton Iprimary 0A ton(max) DRV Isecondary 0A DRV Figure 25. On Time Control Off Time Sequence 0V Vout In a fixed on-time CRM flyback converter, energy stored in the primary of the flyback transformer varies directly with input line voltage on a cycle-by-cycle basis. When the switching cycle is terminated, the energy stored in the transformer is transferred to the secondary. The auxiliary winding used to provide bias to the NCL30000 is also used to detect when the current in the secondary winding has dropped to zero. This is illustrated in Figure 26. 0V VZCD(WIND) VZCD(WIND),off 0V VZCD(WIND),on VCL(POS) VZCD(ARM) VZCD(TRIG) VCL(NEG) ton tdiode 0V toff tSW Figure 26. Ideal CrM Waveforms with ZCD Winding http://onsemi.com 14 NCL30000 ZCD Detection Block A dedicated circuit block is necessary to implement the zero current detection. The NCL30000 provides a separate input pin to signal the controller to turn the power switch back on just after the flyback transformer discharges all the stored energy to the secondary winding. When the output winding current reaches zero the winding voltage will reverse. Since all windings of the transformer reflect the same voltage characteristic this voltage reversal appears on the primary bias winding. Coupling the winding voltage to the ZCD input of the NCL30000 allows the controller to start Varm NZCD the next switching cycle at the precise time. To avoid inadvertent false triggering, the ZCD input has a dual comparator input structure to arm the latch when the ZCD detect voltage rises above 1.4 V (nominal) thus setting the latch. When the voltage on ZCD falls below 0.7 V (nominal) a zero current event is detected and a signal is asserted which initiates the next switching cycle. This is illustrated in Figure 27. The input of the ZCD has an internal circuit which clamps the positive and negative voltage excursions on this pin. The current into or out of the ZCD pin must be limited to 10 mA with an external resistor. Vtrig + - + Bias Winding Voltage RZCD ZCD ZCD Clamp VZCD(ARM) + - + DRIVE Q Reset Dominant Latch R Q S Demag VZCD(TRIG) Figure 27. ZCD Operation Rsense optional Overcurrent Protection (OCP) The dedicated CS pin of the NCL30000 senses the current through the MOSFET switch and the primary side of the transformer. This provides an additional level of protection in the event of a fault. If the voltage of the CS pin exceeds VILIM, the internal comparator will detect the event and turn off the MOSFET. The peak switch current is calculated using Equation 1: I SW(peak) + V ILIM R sense (eq. 1) Figure 28. OCP Circuitry with Optional External RC Filter MFP Input To avoid the probability of false switching, the NCL30000 incorporated a built in leading edge blanking circuit (LEB) which masks the CS signal for a nominal time of 190 ns. If required, an optional RC filter can be added between Rsense and CS to provide additional filtering. This is illustrated below. The multi-function pin is connected to the input of the transconductance amplifier, the undervoltage and overvoltage protection comparators. This allows this pin to perform several functions. To place the device in standby, the MFP pin should be pulled below the Vuvp threshold. This is illustrated in Figure 29. Additionally, raising the MFP pin above Vovp will also suspend switching activity but not place the controller in the standby mode. This can be used implement overvoltage monitoring on the bias winding and add an additional layer of fault protection. http://onsemi.com 15 + At startup, there is no energy in the ZCD winding and no voltage signal to activate the ZCD comparators. To enable the controller to start under these conditions, an internal watchdog timer is provided which initiates a switching cycle in the event that the output drive has been off for more than 180 ms (nominal). The timer is deactivated only under an OVP or UVP fault condition which will be discussed in the next section. DRV CS LEB + - VILIM OCP NCL30000 + OVP - VOVP - UVP + VUVP EA gm OVP Fault POWER GOOD UVP Fault Bias R1 MFP RFB + + Shutdown R2 COMP CCOMP Figure 29. Multi-Function Pin Operation The positive input of the transconductance amplifier is connected to a 2.5 V (nominal) reference. This allows the controller to be used in non-isolated applications where the MFP could be configured in a more classical feedback input configuration. The NCL30000 incorporates a supervisory circuitry to manage the startup and shutdown of the circuit. By managing the startup and keeping the initial startup current at less than 35 mA, a startup resistor connected between the rectified ac line and VCC charges the VCC capacitor to VCC(on). Turn on of the device occurs when the startup voltage has exceeded 12 V (nominal) when the internal reference and switching logic are enabled. A UVLO comparator with a hysteresis of 2.5 V nominal gives ample VCC Management time for the device to start switching and allow the bias from the auxiliary winding to supply VCC. Example Design A practical design case will be used to illustrate the overall power supply functional blocks and the overall design methodology. The power supply specification in this example is listed below and covers an extended universal input range which includes the normal 90 - 265 Vac for global power supplies with an extended upper range to support 277 Vac commercial lighting in the United States. * Input voltage: 90 to 305 Vac * Power factor: > 0.9 * Output current: 350 mA typical * LED load voltage: 12 to 50 Vdc * Full Load Efficiency: > 83% http://onsemi.com 16 + - + (Enable EA) VREF VControl J1-1 L2 2.2mH F1 1 Line R2 5K6 C5 4 T1A D10 MURD330 3 3 R7 47K T1B 5 MMBTA06 D4 MRA4007 D5 ES1M 1 Q4 T1E + C12 470uF + T1C D6 BAS21 2 R23 1k R25 1k R26 D12 BZX84C56 16k T1D 4700 pF C4 100nF C2 47nF V300LA4 R3 5K6 RV1 R6 47K 1A 1 L1 3 C1 47nF 2 4 27mH J2-1 1 J1-2 L3 2.2mH 1 Neutral LED Anode D11 NCL30000 BZX84C5V6 Q2 MMBTA06 C14 100pF 3 2 5 6 4 D13 BAW56 R27 200 C16 100nF 4 3 2 U2 PS2561L_1 1 Figure 30. Wide Input Main, 4-15 LED 350 mA Load Schematic http://onsemi.com R15 100k C8 10uF NCL30000 MFP Comp DRV Ct CS ZCD 5 GND 6 7 R19 10 Q3 SPD02N80 VCC 8 R22 1k R16 47k 1 2 R14 3 C7 4 1nF R17 100 D9 4.7k Q1 C13 100nF 15V T RT1 C9 820 pF R18 100 R20 0.33 W C10 4.7 nF MMBZ5245 MMBTA06 17 R10 6.2k BAW56 D7 R11 100k U3 8 IN1+ 1 VCC IN1- OUT1 OUT2 IN2+ 7 IN2- GND LM2904 C15 220nF U4 TL431A Q5 MMBTA06 R28 470 R31 R30 24k 24k D8 R9 6.2k BZX84C5V1 5.1V R24 47k R29 0.2 W J2-2 1 LED Cathode NCL30000 Zero Current Detection (ZCD) The signal controlling the ZCD function is taken from the primary bias winding. Raising the ZCD pin above 1.4 V arms the zero detection circuit. When the pin voltage subsequently falls below 0.7 V, the controller issues the command to turn the power switch back on. The current in or out of the ZCD pin must be limited to $10 mA by an external resistor. For this reference circuit a resistance of 47 kW provides the required voltage thresholds and limits current to less than 10 mA. Feedback Control capacitor bypasses common mode currents created by the power transformer. The low input capacitance approach taken in this design to meet high power factor has the added benefit of not needing inrush current limiting. Start-up Circuit and Primary Bias The secondary feedback signal is routed through an optocoupler to the primary side NCL30000 controller. LED current is measured with a 0.2 W resistor which for 350 mA has a voltage drop of 70 mV. The control loop must be designed to filter out the haversine ripple component to provide an average feedback level to the pulse width controller. In order to maintain high power factor operation, the compensation components around the error amplifier must be set well below 50 / 60 Hz. The corner frequency typically falls between 10 and 40 Hz. The low frequency response means the control loop will be slow to compensate for rapidly changing situations. In particular, the slow response can introduce overshoot at turn on. To compensate for the slow steady state loop this circuit utilizes a second current control loop to minimize overshoot. The second loop is set for higher than nominal operating current with a very fast response loop. This error amp takes control of the feedback loop until the main error amp is able to respond. In this way the maximum current is limited to safe established level. The current set point of the fast control loop should be set above the peak current of normal operation. U4 is a 2.5 V reference which in conjunction with R26, R27, and R28 establishes the nominal reference voltage of 70 mV mentioned above but also the higher threshold for the fast current loop. In this example, the average output current is 350 mA and the fast loop is set for a 500 mA level. EMI Filter Rapid start up is enhanced by the low current draw of the NCL30000. Resistors connected from the rectified ac line to the VCC circuit provide start up power. Some of the current is needed for the control chip and bias network while the remaining portion charges up a storage capacitor. When the voltage on the capacitor reaches 12 V nominal, the internal references and logic of the NCL30000 are turned on and the part starts switching. The turn on comparator has hysteresis (2.5 V nominal) to ensure sufficient time for the auxiliary winding to start supplying current directly to the VCC capacitor. Resistor divider R9 (6.2 kW) and R15 (100 kW) bias the MFP at the proper voltage to enable the NCL30000. An optional thermal shutdown is implemented with positive temperature coefficient (PTC) thermistor RT1. This thermistor is placed close to the switching FET Q3 sensing temperature stress related to load and surrounding temperature. Situations causing excessive temperature will cause RT1 to switch to a high impedance turning off the NCL30000. When RT1 cools down, normal operation will resume. Transformer Design The EMI filter attenuates the switching current drawn by the power converter reducing the high frequency harmonics to within conducted emissions limits. The filter must not degrade the power factor by introducing a phase shift of the current with the line-to-line or X capacitors. Low total capacitance will minimize this effect. Balancing these attributes is a performance tradeoff considering the wide input voltage requirements. A multi-stage filter consisting of 27 mH common mode inductor and two 2.2 mH differential inductors working with two 47 nF capacitors provides sufficient attenuation to pass conducted emissions requirements. A 4.7 nF "Y1" Single stage high power factor flyback converters process power in a sine-squared manner. To support the average LED load current, the flyback converter must be capable of processing about 2.5 times the average output power. In this case, the flyback transformer is designed to handle a peak power 43 W to power a 17.5 W LED load. The complete details of the transformer design process are found in Application Note AND8451. The NCL30000 is a variable frequency CrM controller and as such the transformer determines the operating frequency for a given set of input and output conditions. The transformer turns ratio is controlled by maximum input and output voltage and the ratings of the FET and output rectifier. In this case, the turns ratio from primary to secondary is set at 3.83. Power switch on-time is set at the low line condition of 90 Vac or 126 V peak and maximum power of 17.5 W. On-time will be 15.8 ms maximum. Primary inductance is calculated from the minimum switching frequency and the conditions listed above as 1.72 mH. Peak primary current of 1.15 A is calculated from the primary inductance, applied voltage, and on-time. Core flux density occurs at the peak of the input haversine. Primary turns are established from inductance, current, maximum flux density and core geometry as 92 turns. Primary turns, http://onsemi.com 18 NCL30000 current, and maximum flux density set gap size and is approximately 0.014 inches for this transformer. The primary 92 turns divided by the previously calculated ratio of 3.83 establishes secondary turns at 24. #26 triple insulated wire is selected for compliance with safety agency isolation requirements. The primary bias winding must supply 10.2 V to maintain NCL30000 operation. The minimum secondary voltage is 12 V and with 24 turns this means the bias winding needs 20.4 turns. Select 22 turns to meet the minimum. For maximum primary to secondary coupling, the primary winding will be split in two equal sections with the secondary winding placed in between. The bias winding is wound on top of the second half of the primary winding. FET Switch bridge and EMI filter. This establishes an initial starting point for the Ct capacitor and further optimization may be needed. For this design, 0.82 nF was used as the final value. Output Filter The NCL30000 controller drives an external power FET controlling the current in the flyback transformer primary. The demonstration board was designed to accept the surface mount DPAK or through-hole TO-220 power packages. The 15 W target application in 50C ambient works well with a DPAK package. The 800 V 2 A rated SPD02N80C3 was chosen. Maximum primary current was calculated as 1.15 A. The NCL30000 has a 0.5 V over-current protection threshold. To allow for 25% margin, a minimum sense resistor of 0.348 W is required. A standard 0.33 W resistor will be selected. The current sense resistor is placed in the source lead of the power FET and coupled to the controller with a 100 W resistor. This resistance in conjunction with the inherent capacitance of the pin filters high frequency noise. In addition, a leading edge blanking (LEB) function is included in the controller. This feature avoids spurious activation of the over-current protection when the power FET is first turned on. On-Time Capacitor As previously discussed, a high power factor isolated single-stage converter processes power in a sine squared manner at twice the line frequency. Energy storage must be provided on the isolated secondary output just as in normal flyback converters however significantly more storage capacity is required due to the haversine energy transfer characteristic. Capacitors are used to store energy as the peak of the 100 or 120 Hz haversine delivers maximum power and then releases the stored energy to the load when the haversine falls below the target output power. As the storage capacitor charges and discharges some ripple current is developed in the LED load. The magnitude of ripple voltage is controlled by the amount of filter capacitance. In this 350 mA application, two 470 mF capacitors are sufficient to provide 30% ripple. High grade electrolytic capacitors should be selected to match driver lifetime with that of the LEDs. Higher temperature rated capacitors enhance lifetime for an optimal solution. To meet ripple requirements in single stage converters filter capacitance is generally high enough that capacitor ripple current is well below device ratings. Secondary Bias Maximum on-time is controlled by the Ct capacitor. Limiting the maximum on-time reduces component stress in transient situations. The formula below establishes the capacitor value based on charging current of 297 mA and maximum voltage threshold of 4.775. The symbol h' represents the effective efficiency of the power transformer stage and secondary losses. It will always be greater than the measured wall plug efficiency which includes losses in the EMI filter and primary side compents. Ct [ 4.94 @ L pri @ P out @ I charge h @ V pk @ V CT(max) 4.94 @ 0.0172 @ 17.5 @ 297 mA 0.87 @ C t [ 1.1 nF 2 @ 90 2 2 @ V pk N @ V out @ )1 (eq. 2) The average mode feedback compensation is intentionally set to a low frequency as described in the feedback section. The relatively large feedback compensation capacitor must charge to normal operating voltage after initial power up which introduces significant delay in regulation. Minimizing the required voltage change on the compensation capacitor allows the feedback loop to take control of the output quicker therefore reducing over-current conditions. Maintaining a low bias voltage reduces the required change in compensation capacitor voltage. For this example, a bipolar transistor and 5.6 V zener diode are employed to provide bias voltage of about 5 V. This bias transistor minimizes power loss and allows the LED driver to operate over a very wide range of output voltage. This circuit will support as few as 4 LEDs and up to 15 LEDs. The secondary bias can be optimized if the application uses a specific number of LEDs. Fewer components and better efficiency can be realized by limiting the output voltage range and adding a secondary bias winding to the transformer. Open Load Protection Ct [ 2 @ 90 3.83 @ 50 )1 @ 4.775 V The Ct equation is an approximation for simplification. For example, Vpk assumes no losses through the diode rectifier The LED driver behaves like a current source where the output voltage is determined by the forward voltage of the LED string. As such, some protection is required to prevent damage in the event of an open LED situation. Transistor (Q5) and zener diode (D12) affords the necessary protection. A 56 V zener is used in this design example. http://onsemi.com 19 NCL30000 Performance Data for 90 to 305 Vac LED Driver Shown below in Figure 31 is the line regulation and efficiency with a 36.9 V, 12 LED load. Note the output 350 345 340 335 LED Current (mA) 330 325 320 315 310 305 300 90 115 LED Current Efficiency current does not vary much over the entire input voltage range. The data is based on the use of an EFD25 transformer. 87% 86% 85% 84% Efficiency (%) 83% 82% 81% 80% 79% 78% 77% 190 215 240 265 290 Input Voltage (Vac) Figure 31. Output Current and Efficiency with 36.9 V Load 140 165 315 Power factor and Total Harmonic Distortion are shown in Figure 32 below. 20 18 16 Input Current THD (%) 14 12 10 8 6 4 2 0 90 115 140 165 190 215 Input Voltage (Vac) 240 265 290 315 THD PF 1.00 0.99 0.98 0.97 0.96 0.95 0.94 0.93 0.92 0.91 0.90 Power Factor (PF) Figure 32. THD and Power Factor with 36.9 V Load http://onsemi.com 20 NCL30000 Load regulation from 12.3 to 52.5 (4 to 15 LEDs) for 115 and 230 Vac input is shown below in Figure 4. Efficiency for this range is also shown. Note the tight regulation. 380 Efficiency is affected by the startup circuit losses in proportion to load and influenced by higher line voltage. 86% 370 84% LED Current (mA) 360 82% Efficiency 350 80% 340 115V LED Current 230V LED Current 115V Efficiency 230V Efficiency 78% 330 76% 320 12 17 22 27 32 37 42 LED Forward Voltage (Vdc) 47 52 57 74% Figure 33. LED Current and Efficiency at 115 and 230 Vac Figure 34 shows the current regulation as a function of output voltage (LED forward voltage). The control loop has been designed to support 4 - 15 LED based on a forward voltage that ranged from 2.6 - 3.5 V. The maximum on time of the control loop has been configured to limit the 60 55 50 LED Forward Voltage (Vdc) 45 40 35 30 25 20 15 10 5 0 0 100 200 300 maximum power delivered. This is illustrated at the top of the output voltage-current transfer function. At the bottom of the curve, even with a short applied to the output, the current is limited to less than 1 A. Protection Region 400 500 600 LED Current (mA) Figure 34. http://onsemi.com 21 700 800 900 1000 NCL30000 Figure 35 shows output ripple current for 115 Vac input and 36.9 (12 LED) load operating at 350 mA average. Scale factor is 67 mA per division. The low frequency ripple follows the input haversine characteristic of single stage converters. Figure 37. Start up Characteristic with 36.9 V, 350 mA Load Typical voltage stress on power FET with 36.9 V, 350 mA load and 305 Vac input voltage is shown in Figure 38. Scale factor is 100 V per division. Figure 35. Output Ripple at 115 Vac and 36.9 V, 350 mA Load Figure 36 shows output ripple current at the main switching frequency. Scale factor is 33 mA per division. This is the signal superimposed over the haversine ripple component. Figure 38. Drain to Source Voltage with 36.9 V, 350 mA Load at 305 Vac Input Figure 36. Output Ripple at 115 Vac and 36.9 V, 350 mA Load Note that while the power supply was designed to meet agency requirements, it has not been submitted for compliance. Standard safety practices should be used when this circuit is energized and in particular when connecting test equipment. During evaluation, input power should be sourced through an isolation transformer. Additional Application Information and Tools Initial start up characteristic is shown in Figure 37 below. Note the higher current limit controlled by the fast feedback loop and the transition to the main average mode feedback control loop. This shows start up at 115 Vac with 36.9 V, 350 mA load. Trace 2 is LED current at 167 mA per division and trace 3 in applied input voltage at 200 V per division. An evaluation board is available for this 90 - 305 Vac design example. Moreover, for applications where it is desired to dim the LEDs via a TRIAC dimmer, please refer to Application Note AND8448 which explains the steps necessary to configure the NCL30000 for TRIAC dimming. In addition there are two additional TRIAC dimmable reference designs which illustrate a complete design for 90 - 135 Vac or 180 - 265 Vac operation. There is also an Microsoft EXCEL spreadsheet tool available to aid in the design process and assist in developing target winding requirements for the transformer. http://onsemi.com 22 NCL30000 PACKAGE DIMENSIONS SOIC-8 NB CASE 751-07 ISSUE AJ A 8 5 -X- B 1 S 4 0.25 (0.010) M Y M -Y- G K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 C -Z- H D 0.25 (0.010) M SEATING PLANE N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 23 NCL30000/D |
Price & Availability of NCL30000
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |